The R65C02 microprocessor
The R65C02 is an enhanced CMOS version of the 6502 with 32 additional
instructions, and an extra address mode.
The changes in the R65C02 are as follows:
- increment instructions can now use accumulator addressing!
- There are bit manipulation instructions (RMB, SMB, BBR, BBS).
- X register indexing now allows JMP (addr,X).
- JMP (addr) can now straddle a page boundary (not so on the 6502).
- Undefined opcodes are now NOP instructions (of various lengths).
- The D flag is cleared on reset or after an interrupt.
- The N flag is now valid in decimal mode.
The entirely new instructions in the R65C02 are:
- BRA - unconditional branch (always)
- PHX - push X onto stack.
- PHY - push Y onto stack.
- PLX - pull X from stack.
- PLY - pull Y from stack.
- STZ - store zero to memory.
- TRB - test and reset memory bits against accumulator
- TSB - test and set memory bits against accumulator
The extra address mode is a "zero page test relative" that the Rockwell
documentation calls simply "relative" addressing, despite the fact that
the original 6502 had a relative mode (used only for branching).
The original 6502
This chip was introduced in 1975 by MOS Technology, which was started by a
group of disgruntled Motorola engineers, primarily to produce the 6502.
It sold for $25, which was impressive compared to $180 for comparable parts
from Motorola or Intel at the time of the chips introduction.
WDC (Western Design Center) has its own R65C02 offshoot, called the W65C02.
Apparently these chips were popular in Rockwell modem products.
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Tom's Computer Info / tom@mmto.org