The are shown in the following link, which is Table 3-1 from the "ARM Cortex-M7 Processor Technical Reference Manual r1p1".
The first thing the demo code does is:0802b1f0: 4823 ldr r0, [pc, #140] ; 0xe000ed88 (0x802b280) 0802b1f2: 6800 ldr r0, [r0, #0] 0802b1f4: f450 0070 orrs.w r0, r0, #0x00f0_0000 0802b1f8: 4921 ldr r1, [pc, #132] ; 0xe000ed88 (0x802b280) 0802b1fa: 6008 str r0, [r1, #0]This register (at offset 0xd88) is the "Coprocessor Access Control Register". Writing the 4 bits as shown gives full access to the FP extension.
0xE000E010 SYST_CSR RW Privileged 0x00000004 SysTick Control and Status Register 0xE000E014 SYST_RVR RW Privileged UNKNOWN SysTick Reload Value Register 0xE000E018 SYST_CVR RW Privileged UNKNOWN SysTick Current Value Register 0xE000E01C SYST_CALIB[b] RO Privileged 0xC0000000 SysTick Calibration Value RegisterThis is described in a different document, the "Arm Cortex-M7 Devices Generic User Guide r1p2" in table 4-33
Tom's Computer Info / tom@mmto.org